Undefined Instruction on Blackfin BF-707 Processor

This article discusses about how we have done debugging of the Undefined Instruction Exception on Blackfin BF-707 Processor.

When debugging from CCES it is observed that the PC status is constantly showing the same address when this exception happens.

So, we tried to call the Compare Files function at the start of the function. We can see the corresponding C Code and Assembly code as shown below

Also before Undefined Instruction Exception is thrown, we can see in below picture how the disassembly code looks like

One of Analog Devices Expert suggested to keep a hardware break-point when the write happens at that address.

The hardware breakpoints can be added while debugging from the emulator.

It is available as shown in below figure

The address at which the Undefined Instruction was getting generated is from 0x080491CC

Hence we have added the Hardware Breakpoints as shown below

On this exception, when we see the CALL STACK it shows the code that is trying to alter this memory address, which is shown in below figure.

In this picture if we see the callstack on left hand side top, then it shows that TWI_Write is writing to the memory 0x080491CC. If we see all the pointers in pDevInfo in top right side one of the buffer pCommBuffer starting address is 0x0804918A. When we copy some data starting from this address, it can overwrite into 0x080491CC when the size to be copies is more than 66 bytes.

This is how we can use hardware breakpoints for finding memory area being read or written.

DCPLBMissWithoutReplacement on BF-707 & CCES 2.5.0

One of the issue that is faced on CrossCore Embedded Studio is DCPLBMissWithoutReplacement. 

We were using one of the project which is developed on CrossCore Embedded Studio 1.1.0 in CrossCore Embedded Studio 2.5.0

Then the IDE in debug mode has thrown the error which is shown in below figure

When we compile this code on CCES 2.5.0 the buffers were getting allocated at size more than 64 MB.

After we had a look at the app_cplbtab.c file which shows that the CPLB Entries are generated for DDR memory size upto 64MB. See the below screen which is taken from app_cplbtab.c

When we change system.svc file the changes shall be reflected in the files which are under system folder. The files are app_cplbtab.c, app_handler_table.c, app_heaptab.c, app_startup.s and app.ldf.

CCES provides a special syntax which the user can place in these files so that the tables can't be modified by the CCES even though the user changes in system.svc file.

When we removed the special syntax from these files the tables are updated properly and the issue got fixed

Below is the updated app_cplbtab.c

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